Abstract

In this paper, a high-speed reconfigurable card-to-card optical interconnect architecture based on hybrid free-space and multi-mode fiber (MMF) propagation is proposed. The use of free-space signal transmission provides flexibility and reconfigurability and the MMF extends the achievable interconnection range. A printed-circuit-board (PCB) based integrated optical interconnect module is designed and developed and proof-of-concept demonstration experiments are carried out. Results show that 3 × 10 Gb/s reconfigurable optical interconnect is realized with ~12 cm free-space propagation and a 10 m MMF length. In addition, since air turbulence due to high temperature of electronic components and heat dissipation fans always exists in typical interconnect environments and it normally results in system performance degradation, its impact on the proposed reconfigurable optical interconnect scheme is also experimentally investigated. Results indicate that even with comparatively strong air turbulence, 3 × 10 Gb/s optical interconnects with flexibility can still be achieved and the power penalty is <0.7 dB.

© 2013 Optical Society of America

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2013 (1)

2012 (6)

2011 (2)

J. S. Walling and D. Allstot, “CMOS powers toward system-on-chip integration,” IEEE Microw. Mag. 12(1), 6–16 (2011).
[Crossref]

M. Heck, H.-W. Chen, A. W. Fang, B. R. Koch, D. Liang, H. Park, M. N. Sysak, and J. E. Bowers, “Hybrid silicon photonics for optical interconnects,” IEEE J. Sel. Top. Quantum Electron. 17(2), 333–346 (2011).
[Crossref]

2010 (3)

R. Kalla, B. Sinharoy, W. J. Starke, and M. Floyd, “Power7: IBM’s next-generation server processor,” IEEE Micro 30(2), 7–15 (2010).
[Crossref]

S. Kamil, L. Oliker, A. Pinar, and J. M. Shalf, “Communication requirements and interconnect optimization for high-end scientific applications,” IEEE Trans. Parallel Distrib. Syst. 21(2), 188–202 (2010).
[Crossref]

A. Vahdat, M. Al-Fares, N. Farrington, R. N. Mysore, G. D. Porter, and S. Radhakrishnan, “Scale-out networking in the data center,” IEEE Micro 30(4), 29–41 (2010).
[Crossref]

2009 (2)

C. L. Schow, F. E. Doany, C. W. Baks, Y. H. Kwark, D. M. Kuchta, and J. A. Kash, “A single-chip CMOS-based parallel optical transceiver capable of 240-Gb/s bidirectional data rates,” J. Lightwave Technol. 27(7), 915–929 (2009).
[Crossref]

F. E. Doany, C. L. Schow, C. W. Baks, D. M. Kuchta, P. Pepeljugoski, L. Schares, R. A. Budd, F. R. Libsch, R. Dangel, F. Horst, B. J. Offrein, and J. A. Jeffrey, “160 Gb/s bidirectional polymer-waveguide board-level optical interconnects using CMOS-based transceivers,” IEEE Trans. Adv. Packag. 32(2), 345–359 (2009).
[Crossref]

2008 (2)

R. Dangel, C. Berger, R. Beyeler, L. Dellmann, M. Gmur, R. Hamelin, F. Horst, T. Lamprecht, T. Morf, S. Oggioni, M. Spreafico, and B. J. Offrein, “Polymer-waveguide-based board-level optical interconnect technology for datacom applications,” IEEE Trans. Adv. Packag. 31(4), 759–767 (2008).
[Crossref]

H. G. Sandalidis, T. A. Tsiftsis, G. K. Karagiannidis, and M. Uysal, “BER performance of FSO links over strong atmospheric turbulence channels with pointing errors,” IEEE Commun. Lett. 12(1), 44–46 (2008).
[Crossref]

2006 (3)

2005 (1)

A. F. Benner, M. Ignatowski, J. A. Kash, D. M. Kuchta, and M. B. Ritther, “Exploitation of optical interconnects in future server architectures,” IBM J. Res. Develop. 49(4.5), 755–775 (2005).
[Crossref]

2004 (1)

2003 (1)

2000 (1)

N. McArdle, M. Naruse, H. Toyoda, Y. Kobayashi, and M. Ishikawa, “Reconfigurable optical interconnections for parallel computing,” Proc. IEEE 88(6), 829–837 (2000).
[Crossref]

Alameh, K.

Alameh, K. E.

Al-Fares, M.

A. Vahdat, M. Al-Fares, N. Farrington, R. N. Mysore, G. D. Porter, and S. Radhakrishnan, “Scale-out networking in the data center,” IEEE Micro 30(4), 29–41 (2010).
[Crossref]

Aljada, M.

Allstot, D.

J. S. Walling and D. Allstot, “CMOS powers toward system-on-chip integration,” IEEE Microw. Mag. 12(1), 6–16 (2011).
[Crossref]

Arnon, S.

Baks, C. W.

C. L. Schow, F. E. Doany, C. W. Baks, Y. H. Kwark, D. M. Kuchta, and J. A. Kash, “A single-chip CMOS-based parallel optical transceiver capable of 240-Gb/s bidirectional data rates,” J. Lightwave Technol. 27(7), 915–929 (2009).
[Crossref]

F. E. Doany, C. L. Schow, C. W. Baks, D. M. Kuchta, P. Pepeljugoski, L. Schares, R. A. Budd, F. R. Libsch, R. Dangel, F. Horst, B. J. Offrein, and J. A. Jeffrey, “160 Gb/s bidirectional polymer-waveguide board-level optical interconnects using CMOS-based transceivers,” IEEE Trans. Adv. Packag. 32(2), 345–359 (2009).
[Crossref]

Benner, A. F.

A. F. Benner, M. Ignatowski, J. A. Kash, D. M. Kuchta, and M. B. Ritther, “Exploitation of optical interconnects in future server architectures,” IBM J. Res. Develop. 49(4.5), 755–775 (2005).
[Crossref]

Berger, C.

R. Dangel, C. Berger, R. Beyeler, L. Dellmann, M. Gmur, R. Hamelin, F. Horst, T. Lamprecht, T. Morf, S. Oggioni, M. Spreafico, and B. J. Offrein, “Polymer-waveguide-based board-level optical interconnect technology for datacom applications,” IEEE Trans. Adv. Packag. 31(4), 759–767 (2008).
[Crossref]

Beyeler, R.

R. Dangel, C. Berger, R. Beyeler, L. Dellmann, M. Gmur, R. Hamelin, F. Horst, T. Lamprecht, T. Morf, S. Oggioni, M. Spreafico, and B. J. Offrein, “Polymer-waveguide-based board-level optical interconnect technology for datacom applications,” IEEE Trans. Adv. Packag. 31(4), 759–767 (2008).
[Crossref]

Bloom, S.

Bowers, J. E.

M. Heck, H.-W. Chen, A. W. Fang, B. R. Koch, D. Liang, H. Park, M. N. Sysak, and J. E. Bowers, “Hybrid silicon photonics for optical interconnects,” IEEE J. Sel. Top. Quantum Electron. 17(2), 333–346 (2011).
[Crossref]

Buckman-Windover, L. A.

Budd, R. A.

F. E. Doany, C. L. Schow, C. W. Baks, D. M. Kuchta, P. Pepeljugoski, L. Schares, R. A. Budd, F. R. Libsch, R. Dangel, F. Horst, B. J. Offrein, and J. A. Jeffrey, “160 Gb/s bidirectional polymer-waveguide board-level optical interconnects using CMOS-based transceivers,” IEEE Trans. Adv. Packag. 32(2), 345–359 (2009).
[Crossref]

Chen, H.-W.

M. Heck, H.-W. Chen, A. W. Fang, B. R. Koch, D. Liang, H. Park, M. N. Sysak, and J. E. Bowers, “Hybrid silicon photonics for optical interconnects,” IEEE J. Sel. Top. Quantum Electron. 17(2), 333–346 (2011).
[Crossref]

Chung, I. S.

Dangel, R.

F. E. Doany, C. L. Schow, C. W. Baks, D. M. Kuchta, P. Pepeljugoski, L. Schares, R. A. Budd, F. R. Libsch, R. Dangel, F. Horst, B. J. Offrein, and J. A. Jeffrey, “160 Gb/s bidirectional polymer-waveguide board-level optical interconnects using CMOS-based transceivers,” IEEE Trans. Adv. Packag. 32(2), 345–359 (2009).
[Crossref]

R. Dangel, C. Berger, R. Beyeler, L. Dellmann, M. Gmur, R. Hamelin, F. Horst, T. Lamprecht, T. Morf, S. Oggioni, M. Spreafico, and B. J. Offrein, “Polymer-waveguide-based board-level optical interconnect technology for datacom applications,” IEEE Trans. Adv. Packag. 31(4), 759–767 (2008).
[Crossref]

Dellmann, L.

R. Dangel, C. Berger, R. Beyeler, L. Dellmann, M. Gmur, R. Hamelin, F. Horst, T. Lamprecht, T. Morf, S. Oggioni, M. Spreafico, and B. J. Offrein, “Polymer-waveguide-based board-level optical interconnect technology for datacom applications,” IEEE Trans. Adv. Packag. 31(4), 759–767 (2008).
[Crossref]

Doany, F. E.

F. E. Doany, C. L. Schow, C. W. Baks, D. M. Kuchta, P. Pepeljugoski, L. Schares, R. A. Budd, F. R. Libsch, R. Dangel, F. Horst, B. J. Offrein, and J. A. Jeffrey, “160 Gb/s bidirectional polymer-waveguide board-level optical interconnects using CMOS-based transceivers,” IEEE Trans. Adv. Packag. 32(2), 345–359 (2009).
[Crossref]

C. L. Schow, F. E. Doany, C. W. Baks, Y. H. Kwark, D. M. Kuchta, and J. A. Kash, “A single-chip CMOS-based parallel optical transceiver capable of 240-Gb/s bidirectional data rates,” J. Lightwave Technol. 27(7), 915–929 (2009).
[Crossref]

Dolfi, D. W.

Fang, A. W.

M. Heck, H.-W. Chen, A. W. Fang, B. R. Koch, D. Liang, H. Park, M. N. Sysak, and J. E. Bowers, “Hybrid silicon photonics for optical interconnects,” IEEE J. Sel. Top. Quantum Electron. 17(2), 333–346 (2011).
[Crossref]

Farrington, N.

A. Vahdat, M. Al-Fares, N. Farrington, R. N. Mysore, G. D. Porter, and S. Radhakrishnan, “Scale-out networking in the data center,” IEEE Micro 30(4), 29–41 (2010).
[Crossref]

Flower, G. M.

Floyd, M.

R. Kalla, B. Sinharoy, W. J. Starke, and M. Floyd, “Power7: IBM’s next-generation server processor,” IEEE Micro 30(2), 7–15 (2010).
[Crossref]

Giboney, K. S.

Gmur, M.

R. Dangel, C. Berger, R. Beyeler, L. Dellmann, M. Gmur, R. Hamelin, F. Horst, T. Lamprecht, T. Morf, S. Oggioni, M. Spreafico, and B. J. Offrein, “Polymer-waveguide-based board-level optical interconnect technology for datacom applications,” IEEE Trans. Adv. Packag. 31(4), 759–767 (2008).
[Crossref]

Grot, A.

Gruhlke, R. W.

Hamelin, R.

R. Dangel, C. Berger, R. Beyeler, L. Dellmann, M. Gmur, R. Hamelin, F. Horst, T. Lamprecht, T. Morf, S. Oggioni, M. Spreafico, and B. J. Offrein, “Polymer-waveguide-based board-level optical interconnect technology for datacom applications,” IEEE Trans. Adv. Packag. 31(4), 759–767 (2008).
[Crossref]

Heck, M.

M. Heck, H.-W. Chen, A. W. Fang, B. R. Koch, D. Liang, H. Park, M. N. Sysak, and J. E. Bowers, “Hybrid silicon photonics for optical interconnects,” IEEE J. Sel. Top. Quantum Electron. 17(2), 333–346 (2011).
[Crossref]

Henderson, C. J.

Horst, F.

F. E. Doany, C. L. Schow, C. W. Baks, D. M. Kuchta, P. Pepeljugoski, L. Schares, R. A. Budd, F. R. Libsch, R. Dangel, F. Horst, B. J. Offrein, and J. A. Jeffrey, “160 Gb/s bidirectional polymer-waveguide board-level optical interconnects using CMOS-based transceivers,” IEEE Trans. Adv. Packag. 32(2), 345–359 (2009).
[Crossref]

R. Dangel, C. Berger, R. Beyeler, L. Dellmann, M. Gmur, R. Hamelin, F. Horst, T. Lamprecht, T. Morf, S. Oggioni, M. Spreafico, and B. J. Offrein, “Polymer-waveguide-based board-level optical interconnect technology for datacom applications,” IEEE Trans. Adv. Packag. 31(4), 759–767 (2008).
[Crossref]

Ignatowski, M.

A. F. Benner, M. Ignatowski, J. A. Kash, D. M. Kuchta, and M. B. Ritther, “Exploitation of optical interconnects in future server architectures,” IBM J. Res. Develop. 49(4.5), 755–775 (2005).
[Crossref]

Ilyadis, N.

N. Ilyadis, “The evolution of next-generation data center networks for high capacity computing,” in Proceedings of Symposium on VLSI Circuits (Honolulu, Hawaii, 2012), pp. 1–5.
[Crossref]

Ishikawa, M.

N. McArdle, M. Naruse, H. Toyoda, Y. Kobayashi, and M. Ishikawa, “Reconfigurable optical interconnections for parallel computing,” Proc. IEEE 88(6), 829–837 (2000).
[Crossref]

Jeffrey, J. A.

F. E. Doany, C. L. Schow, C. W. Baks, D. M. Kuchta, P. Pepeljugoski, L. Schares, R. A. Budd, F. R. Libsch, R. Dangel, F. Horst, B. J. Offrein, and J. A. Jeffrey, “160 Gb/s bidirectional polymer-waveguide board-level optical interconnects using CMOS-based transceivers,” IEEE Trans. Adv. Packag. 32(2), 345–359 (2009).
[Crossref]

Kalla, R.

R. Kalla, B. Sinharoy, W. J. Starke, and M. Floyd, “Power7: IBM’s next-generation server processor,” IEEE Micro 30(2), 7–15 (2010).
[Crossref]

Kamil, S.

S. Kamil, L. Oliker, A. Pinar, and J. M. Shalf, “Communication requirements and interconnect optimization for high-end scientific applications,” IEEE Trans. Parallel Distrib. Syst. 21(2), 188–202 (2010).
[Crossref]

Karagiannidis, G. K.

H. G. Sandalidis, T. A. Tsiftsis, G. K. Karagiannidis, and M. Uysal, “BER performance of FSO links over strong atmospheric turbulence channels with pointing errors,” IEEE Commun. Lett. 12(1), 44–46 (2008).
[Crossref]

Kash, J. A.

C. L. Schow, F. E. Doany, C. W. Baks, Y. H. Kwark, D. M. Kuchta, and J. A. Kash, “A single-chip CMOS-based parallel optical transceiver capable of 240-Gb/s bidirectional data rates,” J. Lightwave Technol. 27(7), 915–929 (2009).
[Crossref]

A. F. Benner, M. Ignatowski, J. A. Kash, D. M. Kuchta, and M. B. Ritther, “Exploitation of optical interconnects in future server architectures,” IBM J. Res. Develop. 49(4.5), 755–775 (2005).
[Crossref]

Kobayashi, Y.

N. McArdle, M. Naruse, H. Toyoda, Y. Kobayashi, and M. Ishikawa, “Reconfigurable optical interconnections for parallel computing,” Proc. IEEE 88(6), 829–837 (2000).
[Crossref]

Koch, B. R.

M. Heck, H.-W. Chen, A. W. Fang, B. R. Koch, D. Liang, H. Park, M. N. Sysak, and J. E. Bowers, “Hybrid silicon photonics for optical interconnects,” IEEE J. Sel. Top. Quantum Electron. 17(2), 333–346 (2011).
[Crossref]

Korevaar, E.

Kuchta, D. M.

F. E. Doany, C. L. Schow, C. W. Baks, D. M. Kuchta, P. Pepeljugoski, L. Schares, R. A. Budd, F. R. Libsch, R. Dangel, F. Horst, B. J. Offrein, and J. A. Jeffrey, “160 Gb/s bidirectional polymer-waveguide board-level optical interconnects using CMOS-based transceivers,” IEEE Trans. Adv. Packag. 32(2), 345–359 (2009).
[Crossref]

C. L. Schow, F. E. Doany, C. W. Baks, Y. H. Kwark, D. M. Kuchta, and J. A. Kash, “A single-chip CMOS-based parallel optical transceiver capable of 240-Gb/s bidirectional data rates,” J. Lightwave Technol. 27(7), 915–929 (2009).
[Crossref]

A. F. Benner, M. Ignatowski, J. A. Kash, D. M. Kuchta, and M. B. Ritther, “Exploitation of optical interconnects in future server architectures,” IBM J. Res. Develop. 49(4.5), 755–775 (2005).
[Crossref]

Kwark, Y. H.

Lamprecht, T.

R. Dangel, C. Berger, R. Beyeler, L. Dellmann, M. Gmur, R. Hamelin, F. Horst, T. Lamprecht, T. Morf, S. Oggioni, M. Spreafico, and B. J. Offrein, “Polymer-waveguide-based board-level optical interconnect technology for datacom applications,” IEEE Trans. Adv. Packag. 31(4), 759–767 (2008).
[Crossref]

Law, B.

Lee, Y. T.

Leyva, D. G.

Liang, D.

M. Heck, H.-W. Chen, A. W. Fang, B. R. Koch, D. Liang, H. Park, M. N. Sysak, and J. E. Bowers, “Hybrid silicon photonics for optical interconnects,” IEEE J. Sel. Top. Quantum Electron. 17(2), 333–346 (2011).
[Crossref]

Libsch, F. R.

F. E. Doany, C. L. Schow, C. W. Baks, D. M. Kuchta, P. Pepeljugoski, L. Schares, R. A. Budd, F. R. Libsch, R. Dangel, F. Horst, B. J. Offrein, and J. A. Jeffrey, “160 Gb/s bidirectional polymer-waveguide board-level optical interconnects using CMOS-based transceivers,” IEEE Trans. Adv. Packag. 32(2), 345–359 (2009).
[Crossref]

Lim, C.

Lin, C.-K.

Marek-Sadowska, M.

V. S. Nandakumar and M. Marek-Sadowska, “A low energy network-on-chip fabric for 3-D multi-core architectures,” IEEE Emerging and Sel. Topics in Circuits and Systems 2, 266–277 (2012).

McArdle, N.

N. McArdle, M. Naruse, H. Toyoda, Y. Kobayashi, and M. Ishikawa, “Reconfigurable optical interconnections for parallel computing,” Proc. IEEE 88(6), 829–837 (2000).
[Crossref]

Mirkarimi, L. W.

Mizuochi, T.

T. Mizuochi, “Recent progress in forward error correction and its interplay with transmission impairments,” IEEE J. Sel. Top. Quantum Electron. 12(4), 544–554 (2006).
[Crossref]

Morf, T.

R. Dangel, C. Berger, R. Beyeler, L. Dellmann, M. Gmur, R. Hamelin, F. Horst, T. Lamprecht, T. Morf, S. Oggioni, M. Spreafico, and B. J. Offrein, “Polymer-waveguide-based board-level optical interconnect technology for datacom applications,” IEEE Trans. Adv. Packag. 31(4), 759–767 (2008).
[Crossref]

Mysore, R. N.

A. Vahdat, M. Al-Fares, N. Farrington, R. N. Mysore, G. D. Porter, and S. Radhakrishnan, “Scale-out networking in the data center,” IEEE Micro 30(4), 29–41 (2010).
[Crossref]

Nandakumar, V. S.

V. S. Nandakumar and M. Marek-Sadowska, “A low energy network-on-chip fabric for 3-D multi-core architectures,” IEEE Emerging and Sel. Topics in Circuits and Systems 2, 266–277 (2012).

Naruse, M.

N. McArdle, M. Naruse, H. Toyoda, Y. Kobayashi, and M. Ishikawa, “Reconfigurable optical interconnections for parallel computing,” Proc. IEEE 88(6), 829–837 (2000).
[Crossref]

Nirmalathas, A.

Offrein, B. J.

F. E. Doany, C. L. Schow, C. W. Baks, D. M. Kuchta, P. Pepeljugoski, L. Schares, R. A. Budd, F. R. Libsch, R. Dangel, F. Horst, B. J. Offrein, and J. A. Jeffrey, “160 Gb/s bidirectional polymer-waveguide board-level optical interconnects using CMOS-based transceivers,” IEEE Trans. Adv. Packag. 32(2), 345–359 (2009).
[Crossref]

R. Dangel, C. Berger, R. Beyeler, L. Dellmann, M. Gmur, R. Hamelin, F. Horst, T. Lamprecht, T. Morf, S. Oggioni, M. Spreafico, and B. J. Offrein, “Polymer-waveguide-based board-level optical interconnect technology for datacom applications,” IEEE Trans. Adv. Packag. 31(4), 759–767 (2008).
[Crossref]

Oggioni, S.

R. Dangel, C. Berger, R. Beyeler, L. Dellmann, M. Gmur, R. Hamelin, F. Horst, T. Lamprecht, T. Morf, S. Oggioni, M. Spreafico, and B. J. Offrein, “Polymer-waveguide-based board-level optical interconnect technology for datacom applications,” IEEE Trans. Adv. Packag. 31(4), 759–767 (2008).
[Crossref]

Oliker, L.

S. Kamil, L. Oliker, A. Pinar, and J. M. Shalf, “Communication requirements and interconnect optimization for high-end scientific applications,” IEEE Trans. Parallel Distrib. Syst. 21(2), 188–202 (2010).
[Crossref]

Park, H.

M. Heck, H.-W. Chen, A. W. Fang, B. R. Koch, D. Liang, H. Park, M. N. Sysak, and J. E. Bowers, “Hybrid silicon photonics for optical interconnects,” IEEE J. Sel. Top. Quantum Electron. 17(2), 333–346 (2011).
[Crossref]

Pepeljugoski, P.

F. E. Doany, C. L. Schow, C. W. Baks, D. M. Kuchta, P. Pepeljugoski, L. Schares, R. A. Budd, F. R. Libsch, R. Dangel, F. Horst, B. J. Offrein, and J. A. Jeffrey, “160 Gb/s bidirectional polymer-waveguide board-level optical interconnects using CMOS-based transceivers,” IEEE Trans. Adv. Packag. 32(2), 345–359 (2009).
[Crossref]

Pinar, A.

S. Kamil, L. Oliker, A. Pinar, and J. M. Shalf, “Communication requirements and interconnect optimization for high-end scientific applications,” IEEE Trans. Parallel Distrib. Syst. 21(2), 188–202 (2010).
[Crossref]

Porter, G. D.

A. Vahdat, M. Al-Fares, N. Farrington, R. N. Mysore, G. D. Porter, and S. Radhakrishnan, “Scale-out networking in the data center,” IEEE Micro 30(4), 29–41 (2010).
[Crossref]

Rachmani, R.

Radhakrishnan, S.

A. Vahdat, M. Al-Fares, N. Farrington, R. N. Mysore, G. D. Porter, and S. Radhakrishnan, “Scale-out networking in the data center,” IEEE Micro 30(4), 29–41 (2010).
[Crossref]

Rankin, G.

Ritther, M. B.

A. F. Benner, M. Ignatowski, J. A. Kash, D. M. Kuchta, and M. B. Ritther, “Exploitation of optical interconnects in future server architectures,” IBM J. Res. Develop. 49(4.5), 755–775 (2005).
[Crossref]

Rosenau, S. A.

Sandalidis, H. G.

H. G. Sandalidis, T. A. Tsiftsis, G. K. Karagiannidis, and M. Uysal, “BER performance of FSO links over strong atmospheric turbulence channels with pointing errors,” IEEE Commun. Lett. 12(1), 44–46 (2008).
[Crossref]

Schares, L.

F. E. Doany, C. L. Schow, C. W. Baks, D. M. Kuchta, P. Pepeljugoski, L. Schares, R. A. Budd, F. R. Libsch, R. Dangel, F. Horst, B. J. Offrein, and J. A. Jeffrey, “160 Gb/s bidirectional polymer-waveguide board-level optical interconnects using CMOS-based transceivers,” IEEE Trans. Adv. Packag. 32(2), 345–359 (2009).
[Crossref]

Schow, C. L.

F. E. Doany, C. L. Schow, C. W. Baks, D. M. Kuchta, P. Pepeljugoski, L. Schares, R. A. Budd, F. R. Libsch, R. Dangel, F. Horst, B. J. Offrein, and J. A. Jeffrey, “160 Gb/s bidirectional polymer-waveguide board-level optical interconnects using CMOS-based transceivers,” IEEE Trans. Adv. Packag. 32(2), 345–359 (2009).
[Crossref]

C. L. Schow, F. E. Doany, C. W. Baks, Y. H. Kwark, D. M. Kuchta, and J. A. Kash, “A single-chip CMOS-based parallel optical transceiver capable of 240-Gb/s bidirectional data rates,” J. Lightwave Technol. 27(7), 915–929 (2009).
[Crossref]

Schuster, J.

Shalf, J. M.

S. Kamil, L. Oliker, A. Pinar, and J. M. Shalf, “Communication requirements and interconnect optimization for high-end scientific applications,” IEEE Trans. Parallel Distrib. Syst. 21(2), 188–202 (2010).
[Crossref]

Simon, J. N.

Sinharoy, B.

R. Kalla, B. Sinharoy, W. J. Starke, and M. Floyd, “Power7: IBM’s next-generation server processor,” IEEE Micro 30(2), 7–15 (2010).
[Crossref]

Skafidas, E.

Spreafico, M.

R. Dangel, C. Berger, R. Beyeler, L. Dellmann, M. Gmur, R. Hamelin, F. Horst, T. Lamprecht, T. Morf, S. Oggioni, M. Spreafico, and B. J. Offrein, “Polymer-waveguide-based board-level optical interconnect technology for datacom applications,” IEEE Trans. Adv. Packag. 31(4), 759–767 (2008).
[Crossref]

Starke, W. J.

R. Kalla, B. Sinharoy, W. J. Starke, and M. Floyd, “Power7: IBM’s next-generation server processor,” IEEE Micro 30(2), 7–15 (2010).
[Crossref]

Sysak, M. N.

M. Heck, H.-W. Chen, A. W. Fang, B. R. Koch, D. Liang, H. Park, M. N. Sysak, and J. E. Bowers, “Hybrid silicon photonics for optical interconnects,” IEEE J. Sel. Top. Quantum Electron. 17(2), 333–346 (2011).
[Crossref]

Tan, M. R. T.

Tandon, A.

Taubenblatt, M. A.

Toyoda, H.

N. McArdle, M. Naruse, H. Toyoda, Y. Kobayashi, and M. Ishikawa, “Reconfigurable optical interconnections for parallel computing,” Proc. IEEE 88(6), 829–837 (2000).
[Crossref]

Tsiftsis, T. A.

H. G. Sandalidis, T. A. Tsiftsis, G. K. Karagiannidis, and M. Uysal, “BER performance of FSO links over strong atmospheric turbulence channels with pointing errors,” IEEE Commun. Lett. 12(1), 44–46 (2008).
[Crossref]

Uysal, M.

H. G. Sandalidis, T. A. Tsiftsis, G. K. Karagiannidis, and M. Uysal, “BER performance of FSO links over strong atmospheric turbulence channels with pointing errors,” IEEE Commun. Lett. 12(1), 44–46 (2008).
[Crossref]

Vahdat, A.

A. Vahdat, M. Al-Fares, N. Farrington, R. N. Mysore, G. D. Porter, and S. Radhakrishnan, “Scale-out networking in the data center,” IEEE Micro 30(4), 29–41 (2010).
[Crossref]

Walling, J. S.

J. S. Walling and D. Allstot, “CMOS powers toward system-on-chip integration,” IEEE Microw. Mag. 12(1), 6–16 (2011).
[Crossref]

Wang, K.

Wilkinson, T. D.

Willebrand, H.

Xia, H.

Zilberman, A.

IBM J. Res. Develop. (1)

A. F. Benner, M. Ignatowski, J. A. Kash, D. M. Kuchta, and M. B. Ritther, “Exploitation of optical interconnects in future server architectures,” IBM J. Res. Develop. 49(4.5), 755–775 (2005).
[Crossref]

IEEE Commun. Lett. (1)

H. G. Sandalidis, T. A. Tsiftsis, G. K. Karagiannidis, and M. Uysal, “BER performance of FSO links over strong atmospheric turbulence channels with pointing errors,” IEEE Commun. Lett. 12(1), 44–46 (2008).
[Crossref]

IEEE Emerging and Sel. Topics in Circuits and Systems (1)

V. S. Nandakumar and M. Marek-Sadowska, “A low energy network-on-chip fabric for 3-D multi-core architectures,” IEEE Emerging and Sel. Topics in Circuits and Systems 2, 266–277 (2012).

IEEE J. Sel. Top. Quantum Electron. (2)

M. Heck, H.-W. Chen, A. W. Fang, B. R. Koch, D. Liang, H. Park, M. N. Sysak, and J. E. Bowers, “Hybrid silicon photonics for optical interconnects,” IEEE J. Sel. Top. Quantum Electron. 17(2), 333–346 (2011).
[Crossref]

T. Mizuochi, “Recent progress in forward error correction and its interplay with transmission impairments,” IEEE J. Sel. Top. Quantum Electron. 12(4), 544–554 (2006).
[Crossref]

IEEE Micro (2)

A. Vahdat, M. Al-Fares, N. Farrington, R. N. Mysore, G. D. Porter, and S. Radhakrishnan, “Scale-out networking in the data center,” IEEE Micro 30(4), 29–41 (2010).
[Crossref]

R. Kalla, B. Sinharoy, W. J. Starke, and M. Floyd, “Power7: IBM’s next-generation server processor,” IEEE Micro 30(2), 7–15 (2010).
[Crossref]

IEEE Microw. Mag. (1)

J. S. Walling and D. Allstot, “CMOS powers toward system-on-chip integration,” IEEE Microw. Mag. 12(1), 6–16 (2011).
[Crossref]

IEEE Photonics Journal (1)

K. Wang, A. Nirmalathas, C. Lim, E. Skafidas, and K. Alameh, “High-speed reconfigurable free-space card-to-card optical interconnects,” IEEE Photonics Journal 4(5), 1407–1419 (2012).
[Crossref]

IEEE Trans. Adv. Packag. (2)

R. Dangel, C. Berger, R. Beyeler, L. Dellmann, M. Gmur, R. Hamelin, F. Horst, T. Lamprecht, T. Morf, S. Oggioni, M. Spreafico, and B. J. Offrein, “Polymer-waveguide-based board-level optical interconnect technology for datacom applications,” IEEE Trans. Adv. Packag. 31(4), 759–767 (2008).
[Crossref]

F. E. Doany, C. L. Schow, C. W. Baks, D. M. Kuchta, P. Pepeljugoski, L. Schares, R. A. Budd, F. R. Libsch, R. Dangel, F. Horst, B. J. Offrein, and J. A. Jeffrey, “160 Gb/s bidirectional polymer-waveguide board-level optical interconnects using CMOS-based transceivers,” IEEE Trans. Adv. Packag. 32(2), 345–359 (2009).
[Crossref]

IEEE Trans. Parallel Distrib. Syst. (1)

S. Kamil, L. Oliker, A. Pinar, and J. M. Shalf, “Communication requirements and interconnect optimization for high-end scientific applications,” IEEE Trans. Parallel Distrib. Syst. 21(2), 188–202 (2010).
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P. K. Pepeljugoski, F. E. Doany, D. M. Kuchta, L. Schares, C. L. Schow, M. B. Ritter, and J. A. Kash, “Data center and high performance computing interconnects for 100 Gb/s and beyond,” in Proceedings of Optical Fiber Communication Conference and National Fiber Optic Engineers Conference (OFC/NFOEC, Anaheim, CA, 2007), pp. 1–3.
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K. Wang, A. Nirmalathas, C. Lim, E. Skafidas, and K. Alameh, “Experimental demonstration of reconfigurable optical interconnect based on hybrid free-space and multi-mode fiber propagation,” in Proceedings of Optical Fiber Communication Conference and Exposition and National Fiber Optic Engineers Conference (OFC/NFOEC, Anaheim, CA, 2013), pp. OTh1A.6.
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Figures (7)

Fig. 1
Fig. 1 Architecture of proposed reconfigurable card-to-card optical interconnects with hybrid free-space and MMF propagations.

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Fig. 2
Fig. 2 Experimental setup (not to scale) for demonstrating the proposed reconfigurable card-to-card optical interconnect architecture based on hybrid free-space and MMF propagations.

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Fig. 3
Fig. 3 Measured BER for configuration 1. Bit rate = 10 Gb/s for each channel. Channel 1: VCSEL 1 to PD 2 of Card 3; Channel 2: VCSEL 2 to PD 4 of Card 2; and Channel 4: VCSEL 4 to PD 1 of Card 2 (channel numbers are based on the original VCSEL element number). (a) BER versus the VCSEL transmission power; and (b) BER versus the received power (reprinted from [23]).

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Fig. 4
Fig. 4 Measured BER for configuration 2. Bit rate = 10 Gb/s for each channel. Channel 1: VCSEL 1 to PD 1 of Card 3; Channel 2: VCSEL 2 to PD 2 of Card 2; and Channel 4: VCSEL 4 to PD 2 of Card 3 (channel numbers are based on the original VCSEL element number). (a) BER versus the VCSEL transmission power; and (b) BER versus the received power (reprinted from [23]).

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Fig. 5
Fig. 5 Measured BER for configuration 3 (the worst-case scenario). Bit rate = 10 Gb/s for each channel. Channel 1: VCSEL 1 to PD 1 of Card 2; Chanel 2: VCSEL 2 to PD 2 of Card 2; and Channel 4: VCSEL 4 to PD 3 of Card 2 (channel numbers are based on the original VCSEL element number). (a) BER versus the VCSEL transmission power; and (b) BER versus the received power.

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Fig. 6
Fig. 6 Experimental setup for investigating the impact of turbulence on the proposed optical interconnect architecture.

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Fig. 7
Fig. 7 Receiver sensitivity for configuration 3 (the worst-case scenario). Bit rate = 10 Gb/s for each channel. (a) Under moderate turbulence; and (b) under strong turbulence.

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