Abstract

This paper presents a method to locally fine tune silicon-on-insulator (SOI) device layer thickness for the fabrication of optimal silicon photonics devices. Very precise control of thickness can be achieved with a modified local oxidation of silicon (LOCOS) process. The fabrication process is robust, complementary metal-oxide-semiconductor (CMOS) compatible and has the advantage of creating vertical tapers (~5.3 µm long for ~210 nm of height) required for impedance matching between sections of different height. The technology is demonstrated by fabricating a TE-pass filter.

© 2015 Optical Society of America

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References

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    [Crossref]
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    [Crossref]
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    [Crossref] [PubMed]
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    [Crossref]
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  8. Y. Xiong, M. Ibrahim, and W. N. Ye, “Low-loss photonic wires defined by local oxidation of silicon (LOCOS),” in Proceedings of SPIE - The International Society for Optical Engineering, v 8265, 2012, Optoelectronic Integrated Circuits XIV, L. A. Eldada and E.-H. Lee, eds. (2012), Vol. 8265, p. 82650D.
    [Crossref]
  9. S. J. Spector and R. B. Swint, “Rib waveguide to strip waveguide mode converter using local oxidation of silicon (LOCOS),” in 2009 6th IEEE International Conference on Group IV Photonics (IEEE, 2009), pp. 83–85.
    [Crossref]
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    [Crossref] [PubMed]
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    [Crossref]
  13. R. C. Jaeger, Introduction to Microelectronic Fabrication: Volume 5 of Modular Series on Solid State Devices (Prentice Hall, 2001), Chap. 3.
  14. Brigham Young University, “Oxide growth calculator - Time given desired thickness”. http://www.cleanroom.byu.edu/OxideTimeCalc.phtml
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    [Crossref]
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2014 (1)

J. H. Schmid, G. T. Reed, G. Z. Mashanovich, D. J. Thomson, M. Nedeljkovic, D. Van Thourhout, S. Keyvaninia, and S. K. Selvaraja, “Silicon photonic integration platform—Have we found the sweet spot?” IEEE J. Sel. Top. Quantum Electron. 20(4), 189–205 (2014).
[Crossref]

2010 (4)

2006 (1)

1997 (1)

I. Moerman, P. P. Van Daele, and P. M. Demeester, “A review on fabrication technologies for the monolithic integration of tapers with III-V semiconductor devices,” IEEE J. Sel. Top. Quantum Electron. 3(6), 1308–1320 (1997).
[Crossref]

1965 (1)

B. Deal and A. Grove, “General relationship for the thermal oxidation of silicon,” J. Appl. Phys. 36(12), 3770–3778 (1965).
[Crossref]

Amberg, P.

Baets, R.

Barwicz, T.

M. A. Popovic, T. Barwicz, E. P. Ippen, and F. X. Kartner, “Global design rules for silicon microphotonic waveguides: Sensitivity, polarization and resonance tunability,” in 2006 Conference on Lasers and Electro-Optics and 2006 Quantum Electronics and Laser Science Conference (IEEE, 2006), pp. 1–2.
[Crossref]

Costa, J.

Cunningham, J. E.

Deal, B.

B. Deal and A. Grove, “General relationship for the thermal oxidation of silicon,” J. Appl. Phys. 36(12), 3770–3778 (1965).
[Crossref]

Demeester, P. M.

I. Moerman, P. P. Van Daele, and P. M. Demeester, “A review on fabrication technologies for the monolithic integration of tapers with III-V semiconductor devices,” IEEE J. Sel. Top. Quantum Electron. 3(6), 1308–1320 (1997).
[Crossref]

Gondarenko, A.

Grove, A.

B. Deal and A. Grove, “General relationship for the thermal oxidation of silicon,” J. Appl. Phys. 36(12), 3770–3778 (1965).
[Crossref]

Higo, A.

L. Li, A. Higo, M. Kubota, M. Sugiyama, and Y. Nakano, “A novel etching-oxidation fabrication method for 3D nano structures on silicon and its application to SOI symmetric waveguide and 3D taper spot size converter,” in 2008 IEEE/LEOS International Conference on Optical MEMs and Nanophotonics (IEEE, 2008), pp. 27–28.

Ho, R.

Ho, S.-T.

Q. Wang and S.-T. Ho, “Ultracompact TM-pass silicon nanophotonic waveguide polarizer and design,” IEEE Photon. J. 2(1), 49–56 (2010).
[Crossref]

Ippen, E. P.

M. A. Popovic, T. Barwicz, E. P. Ippen, and F. X. Kartner, “Global design rules for silicon microphotonic waveguides: Sensitivity, polarization and resonance tunability,” in 2006 Conference on Lasers and Electro-Optics and 2006 Quantum Electronics and Laser Science Conference (IEEE, 2006), pp. 1–2.
[Crossref]

Kartner, F. X.

M. A. Popovic, T. Barwicz, E. P. Ippen, and F. X. Kartner, “Global design rules for silicon microphotonic waveguides: Sensitivity, polarization and resonance tunability,” in 2006 Conference on Lasers and Electro-Optics and 2006 Quantum Electronics and Laser Science Conference (IEEE, 2006), pp. 1–2.
[Crossref]

Keyvaninia, S.

J. H. Schmid, G. T. Reed, G. Z. Mashanovich, D. J. Thomson, M. Nedeljkovic, D. Van Thourhout, S. Keyvaninia, and S. K. Selvaraja, “Silicon photonic integration platform—Have we found the sweet spot?” IEEE J. Sel. Top. Quantum Electron. 20(4), 189–205 (2014).
[Crossref]

Krishnamoorthy, A. V.

Kubota, M.

L. Li, A. Higo, M. Kubota, M. Sugiyama, and Y. Nakano, “A novel etching-oxidation fabrication method for 3D nano structures on silicon and its application to SOI symmetric waveguide and 3D taper spot size converter,” in 2008 IEEE/LEOS International Conference on Optical MEMs and Nanophotonics (IEEE, 2008), pp. 27–28.

Lexau, J.

Li, G.

Li, L.

L. Li, A. Higo, M. Kubota, M. Sugiyama, and Y. Nakano, “A novel etching-oxidation fabrication method for 3D nano structures on silicon and its application to SOI symmetric waveguide and 3D taper spot size converter,” in 2008 IEEE/LEOS International Conference on Optical MEMs and Nanophotonics (IEEE, 2008), pp. 27–28.

Lipson, M.

Luo, Y.

Mashanovich, G. Z.

J. H. Schmid, G. T. Reed, G. Z. Mashanovich, D. J. Thomson, M. Nedeljkovic, D. Van Thourhout, S. Keyvaninia, and S. K. Selvaraja, “Silicon photonic integration platform—Have we found the sweet spot?” IEEE J. Sel. Top. Quantum Electron. 20(4), 189–205 (2014).
[Crossref]

Mekis, A.

Moerman, I.

I. Moerman, P. P. Van Daele, and P. M. Demeester, “A review on fabrication technologies for the monolithic integration of tapers with III-V semiconductor devices,” IEEE J. Sel. Top. Quantum Electron. 3(6), 1308–1320 (1997).
[Crossref]

Nakano, Y.

L. Li, A. Higo, M. Kubota, M. Sugiyama, and Y. Nakano, “A novel etching-oxidation fabrication method for 3D nano structures on silicon and its application to SOI symmetric waveguide and 3D taper spot size converter,” in 2008 IEEE/LEOS International Conference on Optical MEMs and Nanophotonics (IEEE, 2008), pp. 27–28.

Nedeljkovic, M.

J. H. Schmid, G. T. Reed, G. Z. Mashanovich, D. J. Thomson, M. Nedeljkovic, D. Van Thourhout, S. Keyvaninia, and S. K. Selvaraja, “Silicon photonic integration platform—Have we found the sweet spot?” IEEE J. Sel. Top. Quantum Electron. 20(4), 189–205 (2014).
[Crossref]

Pinckney, N.

Pinguet, T.

Popovic, M. A.

M. A. Popovic, T. Barwicz, E. P. Ippen, and F. X. Kartner, “Global design rules for silicon microphotonic waveguides: Sensitivity, polarization and resonance tunability,” in 2006 Conference on Lasers and Electro-Optics and 2006 Quantum Electronics and Laser Science Conference (IEEE, 2006), pp. 1–2.
[Crossref]

Raj, K.

Reed, G. T.

J. H. Schmid, G. T. Reed, G. Z. Mashanovich, D. J. Thomson, M. Nedeljkovic, D. Van Thourhout, S. Keyvaninia, and S. K. Selvaraja, “Silicon photonic integration platform—Have we found the sweet spot?” IEEE J. Sel. Top. Quantum Electron. 20(4), 189–205 (2014).
[Crossref]

Roelkens, G.

Schmid, J. H.

J. H. Schmid, G. T. Reed, G. Z. Mashanovich, D. J. Thomson, M. Nedeljkovic, D. Van Thourhout, S. Keyvaninia, and S. K. Selvaraja, “Silicon photonic integration platform—Have we found the sweet spot?” IEEE J. Sel. Top. Quantum Electron. 20(4), 189–205 (2014).
[Crossref]

Selvaraja, S. K.

J. H. Schmid, G. T. Reed, G. Z. Mashanovich, D. J. Thomson, M. Nedeljkovic, D. Van Thourhout, S. Keyvaninia, and S. K. Selvaraja, “Silicon photonic integration platform—Have we found the sweet spot?” IEEE J. Sel. Top. Quantum Electron. 20(4), 189–205 (2014).
[Crossref]

Sherwood-Droz, N.

Shi, J.

Shubin, I.

Sugiyama, M.

L. Li, A. Higo, M. Kubota, M. Sugiyama, and Y. Nakano, “A novel etching-oxidation fabrication method for 3D nano structures on silicon and its application to SOI symmetric waveguide and 3D taper spot size converter,” in 2008 IEEE/LEOS International Conference on Optical MEMs and Nanophotonics (IEEE, 2008), pp. 27–28.

Thacker, H.

Thomson, D. J.

J. H. Schmid, G. T. Reed, G. Z. Mashanovich, D. J. Thomson, M. Nedeljkovic, D. Van Thourhout, S. Keyvaninia, and S. K. Selvaraja, “Silicon photonic integration platform—Have we found the sweet spot?” IEEE J. Sel. Top. Quantum Electron. 20(4), 189–205 (2014).
[Crossref]

Van Daele, P. P.

I. Moerman, P. P. Van Daele, and P. M. Demeester, “A review on fabrication technologies for the monolithic integration of tapers with III-V semiconductor devices,” IEEE J. Sel. Top. Quantum Electron. 3(6), 1308–1320 (1997).
[Crossref]

Van Thourhout, D.

J. H. Schmid, G. T. Reed, G. Z. Mashanovich, D. J. Thomson, M. Nedeljkovic, D. Van Thourhout, S. Keyvaninia, and S. K. Selvaraja, “Silicon photonic integration platform—Have we found the sweet spot?” IEEE J. Sel. Top. Quantum Electron. 20(4), 189–205 (2014).
[Crossref]

G. Roelkens, D. Van Thourhout, and R. Baets, “High efficiency Silicon-on-Insulator grating coupler based on a poly-Silicon overlay,” Opt. Express 14(24), 11622–11630 (2006).
[Crossref] [PubMed]

Wang, Q.

Q. Wang and S.-T. Ho, “Ultracompact TM-pass silicon nanophotonic waveguide polarizer and design,” IEEE Photon. J. 2(1), 49–56 (2010).
[Crossref]

Yao, J.

Zheng, X.

IEEE J. Sel. Top. Quantum Electron. (2)

I. Moerman, P. P. Van Daele, and P. M. Demeester, “A review on fabrication technologies for the monolithic integration of tapers with III-V semiconductor devices,” IEEE J. Sel. Top. Quantum Electron. 3(6), 1308–1320 (1997).
[Crossref]

J. H. Schmid, G. T. Reed, G. Z. Mashanovich, D. J. Thomson, M. Nedeljkovic, D. Van Thourhout, S. Keyvaninia, and S. K. Selvaraja, “Silicon photonic integration platform—Have we found the sweet spot?” IEEE J. Sel. Top. Quantum Electron. 20(4), 189–205 (2014).
[Crossref]

IEEE Photon. J. (1)

Q. Wang and S.-T. Ho, “Ultracompact TM-pass silicon nanophotonic waveguide polarizer and design,” IEEE Photon. J. 2(1), 49–56 (2010).
[Crossref]

J. Appl. Phys. (1)

B. Deal and A. Grove, “General relationship for the thermal oxidation of silicon,” J. Appl. Phys. 36(12), 3770–3778 (1965).
[Crossref]

Opt. Express (4)

Other (11)

Lumerical Solutions, “Lumerical Solutions, Inc. | Innovative Photonic Design Tools”. https://www.lumerical.com/

Photon Design, “Photon Design - Your source of photonics CAD tools”. https://www.photond.com/

M. A. Popovic, T. Barwicz, E. P. Ippen, and F. X. Kartner, “Global design rules for silicon microphotonic waveguides: Sensitivity, polarization and resonance tunability,” in 2006 Conference on Lasers and Electro-Optics and 2006 Quantum Electronics and Laser Science Conference (IEEE, 2006), pp. 1–2.
[Crossref]

R. C. Jaeger, Introduction to Microelectronic Fabrication: Volume 5 of Modular Series on Solid State Devices (Prentice Hall, 2001), Chap. 3.

Brigham Young University, “Oxide growth calculator - Time given desired thickness”. http://www.cleanroom.byu.edu/OxideTimeCalc.phtml

Brigham Young University, “Oxide Growth Calculator - Thickness given time”. http://www.cleanroom.byu.edu/OxideThickCalc.phtml

G. E. McGuire, Semiconductor materials and process technology handbook: for very large scale integration (VLSI) and ultra large scale integration (ULSI) (Noyes Publications, 1989).

L. Li, A. Higo, M. Kubota, M. Sugiyama, and Y. Nakano, “A novel etching-oxidation fabrication method for 3D nano structures on silicon and its application to SOI symmetric waveguide and 3D taper spot size converter,” in 2008 IEEE/LEOS International Conference on Optical MEMs and Nanophotonics (IEEE, 2008), pp. 27–28.

Y. Xiong, M. Ibrahim, and W. N. Ye, “Low-loss photonic wires defined by local oxidation of silicon (LOCOS),” in Proceedings of SPIE - The International Society for Optical Engineering, v 8265, 2012, Optoelectronic Integrated Circuits XIV, L. A. Eldada and E.-H. Lee, eds. (2012), Vol. 8265, p. 82650D.
[Crossref]

S. J. Spector and R. B. Swint, “Rib waveguide to strip waveguide mode converter using local oxidation of silicon (LOCOS),” in 2009 6th IEEE International Conference on Group IV Photonics (IEEE, 2009), pp. 83–85.
[Crossref]

S. Franssila, Introduction to Microfabrication (Wiley, 2010), Chap.13.

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Figures (9)

Fig. 1
Fig. 1 (a) Standard LOCOS process; (b) modified LOCOS process designed to increase transition length.
Fig. 2
Fig. 2 3D schematic diagram of the TE-pass filter.
Fig. 3
Fig. 3 Top-left (long-dashed red outline): single guided mode in a Si waveguide with a 1000 nm × 50 nm cross-section; Otherwise (short-dashed black outline): seven guided modes in a Si waveguide with a 1000 nm × 260 nm cross-section. The color maps are proportional to the energy density computed by the Lumerical FDTD mode solver.
Fig. 4
Fig. 4 (a) Bidirectional dependence between quasi-TE00 mode transmission efficiency and taper length, for a 1 µm wide taper going from 50 nm to 260 nm in height; (b) Dependence between transmission efficiency and propagation distance through the thinned region of a TE-Pass filter for the quasi-TE00 and quasi-TM00 modes. Simulations in (b) take reflections off the Si handle substrate into account.
Fig. 5
Fig. 5 Vertical cross-section of the electric field magnitude squared (|E|2) computed by Lumerical at the center of the 200 µm TE-pass filter, for both polarizations (ordinate and abscissa units are in microns). Simulations take reflections off the Si handle substrate into account.
Fig. 6
Fig. 6 Ellipsometry measurements of the Si device layer thickness following thinning steps.
Fig. 7
Fig. 7 SEM picture of (a) facet of a waveguide and (b) cross-section of a vertical taper.
Fig. 8
Fig. 8 3D schematic diagram of the optical setup used to characterize the TE-pass filters. The optical fiber is connected to a tunable laser with a linearly polarized output.
Fig. 9
Fig. 9 Example of the output of a 200 µm length TE-pass filter for (a) TE polarization and (b) TM polarization. The scale of the color map is the same for both polarizations. (c) Dependence of TM/TE intensity ratio on the thinned waveguide length. The triangular dots represent experimental measurements whereas the circular dots are simulation results.

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